Name: TE-5201
Brand: Adlink Technology

Features

100 MS/s clock
10 digits resolution
Multiple instrument synchronization
14-bit vertical resolution
2 MS memory depth
Ultra fast waveform downloads using DMA
Low phase noise carrier
Internal trigger generation
Frequency agility: FSK, ramped FSK, sweep, FM
Sequence generator controls 128 k segments

Specifications

Number of Output Channel: 1
Multiple Instrument Synchronization

Description: Multiple instruments can be connected together and synchronized to provide multi-channel synchronization
Sample Clock

Source: From Master card to slave boards through the local bus
Range & Resolution: Same as Sample Clock range and resolution
Initial Skew:<15 ns to the first master;15 ns cumulative to additional slaves

Sample Clock: Internal

Range: 50 S/s to 100 MS/s
Resolution: 10 digits limited by 1 μHz
Accuracy: Same as reference
Stability: Same as reference

Standard
System clock > 0.01% (100 ppm)
Option
System clock > 0.0001% (1 ppm TCXO) initial tolerance over a 19 °C to 29 °C temperature
Range; 1 ppm/ °C below 19 °C and above 29 °C ; 1 ppm/year aging rate
External
10 MHz TTL, 50 % ±2 % duty cycle

Sample Clock Modulation

FM
- Description: Sample clock can be frequency modulated by internal waveforms that are resident in internal memory (fixed waveforms)Modulation Source: Internal sine square, triangle and ramp
- Modulation Freq. Range: 2 mHz to 100 kHz
  Resolution: 10 digits
  Accuracy: 0.1 %
- Peak Freq. Deviation: DC 50 MHz
- Advance: Automatic, triggered, gated or software command
- Marker
  Output and level same as SYNC output.
  Position: Fixed at carrier frequency

FM-Downloaded Arbitrary Waveforms

Description: Sample clock can be frequency modulated arbitrary waveforms that are downloaded by the user (user waveforms)
Modulation Source: User waveform, any shape, 10 to 20000 waveform points
Mod. Sample Clock Range: 1 mS/s
Resolution: 7 digits
Accuracy: 0.1%
Peak Sample Clock Dev: DC to100 MHz
Advance: Automatic, triggered, gated or software command
Marker:
Output and Level: Same as SYNC output
Position: Programmable for selected sample clock frequency
Waveform Download: 5 M points per second.

Description: Current segment is sampled continuously. External low TTL level programs carrier sample clock, external high TTL level programs shifted sample clock frequency. Sample clock changes coherently between frequencies. FSK operates in arbitrary waveforms only.
Carrier Sample Clock Range: 50 S/s to 100 MS/s
FSK Stimuli
External: Front panel Trigger input BNC
Low level = carrier sample clock
High level = hop frequency
Frequency: Ranges from 10 MHz to DC
Internal: Same as internal trigger range
FSK Delay: Minimum 1 waveform cycle +50 ns

Ramped FSK

Description: Same as FSK except carrier sample clock ramps to shifted frequency at a rate defined by the ramp time parameter. External low TTL level programs carrier sample clock, external high TTL level programs shifted frequency
Ramp Time Range 10 μs to 1 s, 3 digits, ±0.1 %

Sweep

Description: Sample clock sweeps continuously from start to stop, at a rate defined by the sweep time. More complex sweep modes and types can be generated using the FM mode in conjunction with the FM composer program
Type: Linear or logarithmic
Direction: Up or down, depending on the start and stop setting
Range: 50 mS/s to 100 MS/s
Time: 1 ms to 1000 s, 7 digits, ±0.1 %
Advance: Automatic, triggered, gated or software command
Marker
Output and Level: Same as SYNC output.
Position: Programmable for selected frequency

Operating Modes

Normal: Continuous waveform is generated
Triggered: Each input cycle generates a single output cycle
Gated: External signal enables generator.
First output cycle synchronous with the active slope of the triggering signal. Last cycle of output waveform always completed
External Burst: Preset number of up to 128 k cycles stimulated by an internal, or external.
This mode is not available in Sequencer mode

Trigger Sources

External
Input: Front panel BNC
Level: TTL
Slope Positive or negative, programmable
Frequency: 5 MHz to DC
Internal
Range: 100 mHz to 2 MHz
Resolution: 7 digits
Accuracy: 0.1%
Backplane: TTL Trig0 through TTL Trig7, STAR
Software: SCPI command

System Delay

Trigger to waveform out: 1 Sample Clock +120 ns

Standard Waveforms Library

Waveforms: Sine, Triangle, Square, Pulse, Ramp, Sinc, Gaussian Pulse, Exponential decay/Rise Pulse, Noise, DC
Frequency Range: Waveform dependent

Arbitrary Waveform

Waveform Memory: 1 M points, 2 M points optional
Memory Segmentation
Number of Segments: 1 to 64 K (128 K with 2 Mb option)
Min Segment Size: 16 points
Memory Interleave: 4 (All trace lengths must be multiples of 4)
Vertical Resolution: 14 bits (16,384 points)
Sine Wave Performance
Sine wave performance is measured using the maximum sample clock rate, at 5 Vpp, the maximum amplitude resolution of the DAC (14-bit) and without filters.
Spectrum analyzer settings: Start frequency = 0 MHz; stop frequency = 50 MHz (Nyquist frequency)
Sine wave Total Harmonic Distortion: 0.3 % to 1 MHz
Harmonics and non-related spurious
Below 10 MHz
<-55 dBc for carrier frequencies <1 MHz
<-40 dBc for carrier frequencies <5 MHz
<-25 dBc for carrier frequencies <25 MHz

Sequenced Arbitrary Waveform

Operation: Permits division of the memory bank into smaller segments. Segments may be linked, and repeated in user-configurable fashion to generate extremely long waveforms
Advance Modes
- Automatic Sequence Advance: No triggers required to step from one segment to the next. Sequence is repeated continuously through a pre-programmed sequence table. Stepped Sequence Advance: Current segment is sampled continuously, external trigger advances to next programmed segment. Control input is TRIG IN connector
- Single Sequence Advance: Current segment is sampled to the end of the segment including repeats and idles there. Next trigger advances to next segment. Control input is the TRIG IN connector
- Mixed Sequence Advance: Each step of a sequence can be programmed to advance either
a) automatically (Automatic Sequence Advance), or
b) with a trigger (Stepped Sequence Advance)
Advance Source: External, internal, or soft trigger
Sequencer steps from: 1 to 4096
Segment loops from: 1 to 128 k

Outputs

Waveform Output

Connector: Front panel BNC
Stand-by: Output Off or Normal
Impedance: 50 Ω, ±1 %
Protection: Protected against temporary short to case ground
Amplitude:
Range: 80 mVpp to 8 Vpp, at 50 Ω load; 160 mVpp to 16 Vpp, for open circuits
Resolution: 3.5 digits
Accuracy (1 kHz):
±(1%+25 mV), 1.000 V to 10 Vpp
±(1%+5 mV), 80 mV to 999.9 mVpp
Offset: Offset is attenuated with amplitude
Range: 0 to ±3.6 V, amplitude dependent
Resolution: 22 mV

Accuracy

±4 V window ±(1 % of reading +1 % if amplitude +2 mV)
±400 mV window ±(1 % of reading +1 % if amplitude +200 μV)
Filters: 25 MHz and 50 MHz, 7-pole elliptic

Square Wave, Pulse

Rise/Fall time:<10 ns,10 % to 90 % of amplitude
Aberration: < 5 %
SYNC/Marker Output Description: Provides dual functionality. All functions and modes, this output generates sync pulse, which is synchronous with the output wave form. In FM and sweep modes only, this output generates a marker having properties similar to the sync pulse output
Connector: Front panel BNC
Impedance: 50 Ω, ±1 %
Level: > 2 V into 50 Ω, 4 V nominal into 10 kΩ
Protection: Protected against temporary short to case ground
Position: Point 0 to n, Programmable with 4-point resolution

Sine Output

Description: An output that is directly derived from the sample clock generator and has an output frequency equal to the programmed sample clock frequency. This output generates sine waveforms that corresponds to sample clock setting, including modulated waveform, such as FM, sweep and FSK
Connector: Front panel SMB
Impedance: 50 Ω, ±1 %
Level: 1 V into 50 Ω
Protection: Protected against temporary short to case ground
Source: Sample clock frequency
Frequency Range and Resolution: Same as Sample clock
Flatness: -3 dB at 100 MHz
Total Harmonic Distortion: <40 dBc to 1 MHz
Harmonics & non-related spurious:
<50 dBc to 10 MHz
<38 dBc to 100 MHz